/* dacq25vb.c - 12 bit windows library source * * copyright (c) 1999 Base2 Computer Corporation * * this file contains interface calls for the dacq25 10 or 12 bit versions * to use with visual basic 5.0. see below for examples of calling implementation * and parameter types * * VB5 declartions * * Public Declare Sub initAcqHw Lib "Dacq25vb" () * Public Declare Sub doneAcqHw Lib "Dacq25vb" () * Public Declare Function detect Lib "Dacq25vb" (ByVal lptID As Long) As Long * Public Declare Function getDigDat Lib "Dacq25vb" () As Long * Public Declare Function getAnlgDat Lib "Dacq25vb" (ByVal chnlID As Long) As Long * Public Declare Sub putDigDat Lib "Dacq25vb" (ByVal dData As Byte) * Public Declare Function setUpAnlgInput(ByVal diffMask As Long, ByVal bpMask As Long) As Long */ /*define labels for conditional compile*/ #define DACQ2512BIT /*select between 12 and 10 bit hardware*/ #define SLOWPORT /*some ports can go faster then others*/ #include "dacq25vb.h" #include #include #include #include #include #include /* define global varibles */ union Ua2dCtlReg a2dImage; /*a2d mode*/ int lptDO; /*port id for data output*/ int lptCO; /* '' '' '' control output*/ int lptCSI; /* '' '' '' control status in*/ int lptSI; /* '' '' '' status in*/ unsigned char a2dIOBuf[64]; /*buffer for a2d commands, 8 channels*/ unsigned char a2dIState[8]; /*current copy of shift buffer*/ int aInputState; /*analog inputs state single ended or bipolar*/ union UlptCO ctlImage; /*copy of ctl port*/ HANDLE hDLLInst = 0; HANDLE DllMain (HANDLE hModule, DWORD dwFunction, LPVOID lpNot) { hDLLInst = hModule; switch (dwFunction) { case DLL_PROCESS_ATTACH: case DLL_PROCESS_DETACH: default: break; } return TRUE; } /* * init instance of acq hardware */ __declspec(dllexport) void initAcqHw() { /*a2d chnl sel codes for single-ended mode*/ const unsigned char acqSelChSM[8] = {0x00,0x04,0x01,0x05,0x02,0x06,0x03,0x07}; int chIdx; union Ua2dCtlReg tAImage; union UlptCO tCImage; /*max192 control reg*/ a2dImage.bf.start = 1; /*start bit*/ a2dImage.bf.sel = 0; /*channel 0 default*/ a2dImage.bf.uniBipN = 1; /*unipolar*/ a2dImage.bf.sglDifN = 1; /*single ended*/ a2dImage.bf.pd = 2; /*internal clock mode*/ /*lpt port ids*/ lptDO = 0; lptCO = 0; lptCSI = 0; lptSI = 0; /*lpt control port image*/ ctlImage.w = 0; ctlImage.bf.sdi = 1; /*active high, set low for power savings*/ ctlImage.bf.dld = 0; /* active high, h/w inverted*/ /*setup a2d command buffer*/ ctlImage.bf.cs = 1; /* h/w inverted, low to select a2d when used*/ ctlImage.bf.sclk = 0; /* h/w inverted, data comes out on low clock*/ tCImage.w = ctlImage.w; for (chIdx=0; chIdx<=7*8; chIdx+=8) { tAImage.w = a2dImage.w; tAImage.bf.sel = acqSelChSM[chIdx/8]; a2dIState[chIdx/8] = tAImage.w; tCImage.bf.sdi = (tAImage.w >> 7) & 0x01; a2dIOBuf[chIdx] = tCImage.w; tCImage.bf.sdi = (tAImage.w >> 6) & 0x01; a2dIOBuf[chIdx+1] = tCImage.w; tCImage.bf.sdi = (tAImage.w >> 5) & 0x01; a2dIOBuf[chIdx+2] = tCImage.w; tCImage.bf.sdi = (tAImage.w >> 4) & 0x01; a2dIOBuf[chIdx+3] = tCImage.w; tCImage.bf.sdi = (tAImage.w >> 3) & 0x01; a2dIOBuf[chIdx+4] = tCImage.w; tCImage.bf.sdi = (tAImage.w >> 2) & 0x01; a2dIOBuf[chIdx+5] = tCImage.w; tCImage.bf.sdi = (tAImage.w >> 1) & 0x01; a2dIOBuf[chIdx+6] = tCImage.w; tCImage.bf.sdi = tAImage.w & 0x01; a2dIOBuf[chIdx+7] = tCImage.w; } } /* * delete acq hardware */ __declspec(dllexport) void doneAcqHw() { /*turn off hardware*/ _outp(lptDO, 0x00); } /* * detect acq hardware on parallel port and determine sampling speed for * computer system. * * parms: lptID - 0 to auto detect any port * - 1 to 3 to detect a specific port * returns: STSOK - hardware detected, or error code */ __declspec(dllexport) int detect(int lptID) { int numPorts = 3, idx, hwFound = FALSE; union UlptSI status; const int pPortOfs[] = {0x408, 0x40a, 0x40c}; /*adr of dos lpt i/o*/ const int pPort[] = {0x3bc, 0x378, 0x278}; /*lpt possible i/o port*/ /*read bios equip status for num of ports*/ if (lptID == 0) { /*auto detect hardware*/ /*test addresses and search for hardware*/ /*check for select low (indicates printer not ready)*/ /*toggle power and check wrap-around bit*/ idx=0; while ((idx<3) && !hwFound) { lptDO = pPort[idx]; lptSI = lptDO + 1; lptCO = lptDO + 2; lptCSI = lptDO + 2; status.w = _inp(lptSI); if (status.bf.slct == 0) { /*turn off hardware*/ _outp(lptDO, 0x00); sleep200(); status.w = _inp(lptSI); if (status.bf.pe == 0) { /*turn on hardware*/ _outp(lptDO, 0xfe); sleep200(); status.w = _inp(lptSI); if (status.bf.pe == 0) return(PWRFLT); hwFound = TRUE; } else return(PWRFLT); }; idx++; }; } else { /*detect address for specific port passed*/ lptDO = pPort[lptID-1]; lptSI = lptDO + 1; lptCO = lptDO + 2; lptCSI = lptDO + 2; status.w = _inp(lptSI); if (status.bf.slct == 0) { /*turn off hardware*/ _outp(lptDO, 0x00); sleep200(); status.w = _inp(lptSI); if (status.bf.pe == 0) { /*turn on hardware*/ _outp(lptDO, 0xfe); sleep200(); status.w = _inp(lptSI); if (status.bf.pe == 0) return(PWRFLT); hwFound = TRUE; } else return(PWRFLT); }; }; if (!hwFound) return(NOHWDET); /*by here we should be error free and powered up*/ return(STSOK); }; /* * setup analog input channel types * * returns 0 for success, -1 for error * * the a2d combines ch0/ch1, ch2/ch3, ch4/ch5, ch6/ch7 for differential inputs * a check is made if differential and both channels must have same polarity * * diffMask encoding * bit7 - set ch7 & ch6 diff, clr single ended * bit6 - '' ch5 & ch4 '' '' '' '' * bit5 - '' ch3 & ch2 '' '' '' '' * bit4 - '' ch1 & ch0 '' '' '' '' * bit3 - set ch7=V+ ch6=V-, clr ch6=V+, ch7=V- * bit2 - '' ch5=V+ ch4=V-, '' ch4=V+, ch5=V- * bit1 - '' ch3=V+ ch2=V-, '' ch2=V+, ch3=V- * bit0 - '' ch1=V+ ch0=V-, '' ch0=V+, ch1=V- * * bpMask encoding * bit7 - set if ch7 is bipolar, clr for single ended * bit6 - '' '' ch6 '' '' '' '' '' '' * bit5 - '' '' ch5 '' '' '' '' '' '' * bit4 - '' '' ch4 '' '' '' '' '' '' * bit3 - '' '' ch3 '' '' '' '' '' '' * bit2 - '' '' ch2 '' '' '' '' '' '' * bit1 - '' '' ch1 '' '' '' '' '' '' * bit0 - '' '' ch0 '' '' '' '' '' '' */ __declspec(dllexport) int setUpAnlgInput(int diffMask, int bpMask) { union Ua2dCtlReg inState[8]; union Ua2dCtlReg tAImage; union UlptCO tCImage; int chIdx; /*setup control image*/ tCImage.w = 0; tCImage.bf.sdi = 1; /*active high, set low for power savings*/ tCImage.bf.dld = 0; /* active high, h/w inverted*/ tCImage.bf.cs = 1; /* h/w inverted, low to select a2d when used*/ tCImage.bf.sclk = 0; /* h/w inverted, data comes out on low clock*/ /*get current a2d control state*/ for (chIdx=0;chIdx<=7;chIdx++) inState[chIdx].w = a2dIState[chIdx]; /*add new bipolar controls*/ inState[0].bf.uniBipN = 1; /*unipolar*/ if ((bpMask & 0x01) == 0x01) inState[0].bf.uniBipN = 0; /*bipolar*/ inState[1].bf.uniBipN = 1; if ((bpMask & 0x02) == 0x02) inState[1].bf.uniBipN = 0; inState[2].bf.uniBipN = 1; if ((bpMask & 0x04) == 0x04) inState[2].bf.uniBipN = 0; inState[3].bf.uniBipN = 1; if ((bpMask & 0x08) == 0x08) inState[3].bf.uniBipN = 0; inState[4].bf.uniBipN = 1; if ((bpMask & 0x10) == 0x10) inState[4].bf.uniBipN = 0; inState[5].bf.uniBipN = 1; if ((bpMask & 0x20) == 0x20) inState[5].bf.uniBipN = 0; inState[6].bf.uniBipN = 1; if ((bpMask & 0x40) == 0x40) inState[6].bf.uniBipN = 0; inState[7].bf.uniBipN = 1; if ((bpMask & 0x80) == 0x80) inState[7].bf.uniBipN = 0; /*add new differential controls, check if both inputs setup the same*/ /*channel 1 & 0*/ if ((diffMask & 0x10) == 0x10) { if ( ((bpMask & 0x03) == 0x03) || ((bpMask & 0x03)==0) ) { if ((diffMask & 0x01) == 0x01) { /*diff ch1 V+*/ inState[0].bf.sglDifN = 0; inState[0].bf.sel = 0x04; /*only converts + side*/ inState[1].bf.sglDifN = 0; inState[1].bf.sel = 0x04; } else { /*diff ch0 V+*/ inState[0].bf.sglDifN = 0; inState[0].bf.sel = 0x00; inState[1].bf.sglDifN = 0; inState[1].bf.sel = 0x00; } } else return(-1); } else { /*return to single ended*/ inState[0].bf.sglDifN = 1; inState[0].bf.sel = 0x00; inState[1].bf.sglDifN = 1; inState[1].bf.sel = 0x04; } /*channel 3 & 2*/ if ((diffMask & 0x20) == 0x20) { if ( ((bpMask & 0x0c) == 0x0c) || ((bpMask & 0x0c)==0) ) { if ((diffMask & 0x02) == 0x02) { /*diff ch3 V+*/ inState[2].bf.sglDifN = 0; inState[2].bf.sel = 0x05; inState[3].bf.sglDifN = 0; inState[3].bf.sel = 0x05; } else { /*diff ch2 V+*/ inState[2].bf.sglDifN = 0; inState[2].bf.sel = 0x01; inState[3].bf.sglDifN = 0; inState[3].bf.sel = 0x01; } } else return(-1); } else { /*return to single ended*/ inState[2].bf.sglDifN = 1; inState[2].bf.sel = 0x01; inState[3].bf.sglDifN = 1; inState[3].bf.sel = 0x05; } /*channel 5 & 4*/ if ((diffMask & 0x40) == 0x40) { if ( ((bpMask & 0x30) == 0x30) || ((bpMask & 0x30)==0) ) { if ((diffMask & 0x04) == 0x04) { /*diff ch5 V+*/ inState[4].bf.sglDifN = 0; inState[4].bf.sel = 0x06; inState[5].bf.sglDifN = 0; inState[5].bf.sel = 0x06; } else { /*diff ch4 V+*/ inState[4].bf.sglDifN = 0; inState[4].bf.sel = 0x02; inState[5].bf.sglDifN = 0; inState[5].bf.sel = 0x02; } } else return(-1); } else { /*return to single ended*/ inState[4].bf.sglDifN = 1; inState[4].bf.sel = 0x02; inState[5].bf.sglDifN = 1; inState[5].bf.sel = 0x06; } /*channel 7 & 6*/ if ((diffMask & 0x80) == 0x80) { if ( ((bpMask & 0xc0) == 0xc0) || ((bpMask & 0xc0)==0) ) { if ((diffMask & 0x08) == 0x08) { /*diff ch7 V+*/ inState[6].bf.sglDifN = 0; inState[6].bf.sel = 0x07; inState[7].bf.sglDifN = 0; inState[7].bf.sel = 0x07; } else { /*diff ch6 V+*/ inState[6].bf.sglDifN = 0; inState[6].bf.sel = 0x03; inState[7].bf.sglDifN = 0; inState[7].bf.sel = 0x03; } } else return(-1); } else { /*return to single ended*/ inState[6].bf.sglDifN = 1; inState[6].bf.sel = 0x03; inState[7].bf.sglDifN = 1; inState[7].bf.sel = 0x07; } /*error free by here*/ /*copy new command strings to shift buffer*/ aInputState = bpMask; for (chIdx=0; chIdx<=7*8; chIdx+=8) { tAImage.w = inState[chIdx/8].w; a2dIState[chIdx/8] = tAImage.w; tCImage.bf.sdi = (tAImage.w >> 7) & 0x01; a2dIOBuf[chIdx] = tCImage.w; tCImage.bf.sdi = (tAImage.w >> 6) & 0x01; a2dIOBuf[chIdx+1] = tCImage.w; tCImage.bf.sdi = (tAImage.w >> 5) & 0x01; a2dIOBuf[chIdx+2] = tCImage.w; tCImage.bf.sdi = (tAImage.w >> 4) & 0x01; a2dIOBuf[chIdx+3] = tCImage.w; tCImage.bf.sdi = (tAImage.w >> 3) & 0x01; a2dIOBuf[chIdx+4] = tCImage.w; tCImage.bf.sdi = (tAImage.w >> 2) & 0x01; a2dIOBuf[chIdx+5] = tCImage.w; tCImage.bf.sdi = (tAImage.w >> 1) & 0x01; a2dIOBuf[chIdx+6] = tCImage.w; tCImage.bf.sdi = tAImage.w & 0x01; a2dIOBuf[chIdx+7] = tCImage.w; }; return(0); } /* * get analog data * * input parameter a2d channel id ranges from 1 to 8 */ __declspec(dllexport) int getAnlgDat(int chnlID) { unsigned char tImage = ctlImage.w; int rValue = 0; int tCO = lptCO; int tSI = lptSI; //chnl sel codes for single-ended mode const unsigned char acqSelChSM[8] = {0x00,0x04,0x01,0x05,0x02,0x06,0x03,0x07}; union Ua2dCtlReg tAImage; union UlptCO tCImage; unsigned char a2d0,a2d1,a2d2,a2d3,a2d4,a2d5,a2d6,a2d7; /*format a2d command serial data*/ tAImage.w = a2dImage.w; tAImage.bf.sel = acqSelChSM[chnlID-1]; tCImage.w = ctlImage.w; tCImage.bf.sdi = (tAImage.w >> 7) & 0x01; a2d7 = tCImage.w; tCImage.bf.sdi = (tAImage.w >> 6) & 0x01; a2d6 = tCImage.w; tCImage.bf.sdi = (tAImage.w >> 5) & 0x01; a2d5 = tCImage.w; tCImage.bf.sdi = (tAImage.w >> 4) & 0x01; a2d4 = tCImage.w; tCImage.bf.sdi = (tAImage.w >> 3) & 0x01; a2d3 = tCImage.w; tCImage.bf.sdi = (tAImage.w >> 2) & 0x01; a2d2 = tCImage.w; tCImage.bf.sdi = (tAImage.w >> 1) & 0x01; a2d1 = tCImage.w; tCImage.bf.sdi = tAImage.w & 0x01; a2d0 = tCImage.w; __asm { //initialize vars mov bx,word ptr tSI mov dx,word ptr tCO //take analog sample mov al,byte ptr tImage //get image //set cs enable low, lptCO bit 3, h/w inverted or al,0x08 //set inverted cs low out dx,al //send command out dx,al //delay mov tImage,al //save new image //shift out a2d command //send a2d ctl bit 7 mov al,a2d7 out dx,al out dx,al //delay or al,0x01 //set sclk out dx,al //rising edge out dx,al //delay #ifdef SLOWPORT out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay #endif //send a2d ctl bit 6 mov al,a2d6 out dx,al out dx,al //delay or al,0x01 //set sclk out dx,al //rising edge out dx,al //delay #ifdef SLOWPORT out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay #endif //send a2d ctl bit 5 mov al,a2d5 out dx,al out dx,al //delay or al,0x01 //set sclk out dx,al //rising clock out dx,al //delay #ifdef SLOWPORT out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay #endif //send a2d ctl bit 4 mov al,a2d4 out dx,al out dx,al //delay or al,0x01 //set sclk out dx,al //rising clock out dx,al //delay #ifdef SLOWPORT out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay #endif //send a2d ctl bit 3 mov al,a2d3 out dx,al out dx,al //delay or al,0x01 //set sclk out dx,al //rising clock out dx,al //delay #ifdef SLOWPORT out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay #endif //send a2d ctl bit 2 mov al,a2d2 out dx,al out dx,al //delay or al,0x01 //set sclk out dx,al //rising clock out dx,al //delay #ifdef SLOWPORT out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay #endif //send a2d ctl bit 1 mov al,a2d1 out dx,al out dx,al //delay or al,0x01 //set sclk out dx,al //rising clock out dx,al //delay #ifdef SLOWPORT out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay #endif //send a2d ctl bit 0 mov al,a2d0 out dx,al out dx,al //delay or al,0x01 //set sclk out dx,al //rising clock out dx,al //delay #ifdef SLOWPORT out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay #endif //shift in 12 bits of data from a2d //generate extra clk between in and out data and al,0xfe //clr sclk out dx,al //falling clock out dx,al //delay or al,0x01 //set sclk out dx,al //rising clock out dx,al //delay #ifdef SLOWPORT out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay #endif #ifdef DACQ2512BIT //toggle clk and read data bit 11 and al,0xfe //clr sclk out dx,al //falling edge out dx,al //delay or al,0x01 //set sclk out dx,al //rising clock out dx,al //delay #ifdef SLOWPORT out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay #endif xchg dx,bx //get input port in al,dx //get bit rcl al,1 //put bit 7 into carry rcl word ptr rValue,1 //put bit into result xchg bx,dx //get cmd port mov al,tImage //get ctl image //toggle clk and read data bit 10 and al,0xfe //clr sclk out dx,al //send bit out dx,al //delay or al,0x01 //set sclk out dx,al //rising clock out dx,al //delay #ifdef SLOWPORT out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay #endif xchg dx,bx //get input port in al,dx //get bit rcl al,1 //put bit 7 into carry rcl word ptr rValue,1 //put bit into result xchg bx,dx //get cmd port mov al,tImage //get ctl image #endif //toggle clk and read data bit 9 and al,0xfe //clr sclk out dx,al //falling edge out dx,al //delay or al,0x01 //set sclk out dx,al //rising clock out dx,al //delay #ifdef SLOWPORT out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay #endif xchg dx,bx //get input port in al,dx //get bit rcl al,1 //put bit 7 into carry rcl word ptr rValue,1 //put bit into result xchg bx,dx //get cmd port mov al,tImage //get ctl image //toggle clk and read data bit 8 and al,0xfe //clr sclk out dx,al //send bit out dx,al //delay or al,0x01 //set sclk out dx,al //rising clock out dx,al //delay #ifdef SLOWPORT out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay #endif xchg dx,bx //get input port in al,dx //get bit rcl al,1 //put bit 7 into carry rcl word ptr rValue,1 //put bit into result xchg bx,dx //get cmd port mov al,tImage //get ctl image //toggle clk and read data bit 7 and al,0xfe //clr sclk out dx,al //send bit out dx,al //delay or al,0x01 //set sclk out dx,al //rising clock out dx,al //delay #ifdef SLOWPORT out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay #endif xchg dx,bx //get input port in al,dx //get bit rcl al,1 //put bit 7 into carry rcl word ptr rValue,1 //put bit into result xchg bx,dx //get cmd port mov al,tImage //get ctl image //toggle clk and read data bit 6 and al,0xfe //clr sclk out dx,al //send bit out dx,al //delay or al,0x01 //set sclk out dx,al //rising clock out dx,al //delay #ifdef SLOWPORT out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay #endif xchg dx,bx //get input port in al,dx //get bit rcl al,1 //put bit 7 into carry rcl word ptr rValue,1 //put bit into result xchg bx,dx //get cmd port mov al,tImage //get ctl image //toggle clk and read data bit 5 and al,0xfe //clr sclk out dx,al //send bit out dx,al //delay or al,0x01 //set sclk out dx,al //rising clock out dx,al //delay #ifdef SLOWPORT out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay #endif xchg dx,bx //get input port in al,dx //get bit rcl al,1 //put bit 7 into carry rcl word ptr rValue,1 //put bit into result xchg bx,dx //get cmd port mov al,tImage //get ctl image //toggle clk and read data bit 4 and al,0xfe //clr sclk out dx,al //send bit out dx,al //delay or al,0x01 //set sclk out dx,al //rising clock out dx,al //delay #ifdef SLOWPORT out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay #endif xchg dx,bx //get input port in al,dx //get bit rcl al,1 //put bit 7 into carry rcl word ptr rValue,1 //put bit into result xchg bx,dx //get cmd port mov al,tImage //get ctl image //toggle clk and read data bit 3 and al,0xfe //clr sclk out dx,al //send bit out dx,al //delay or al,0x01 //set sclk out dx,al //rising clock out dx,al //delay #ifdef SLOWPORT out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay #endif xchg dx,bx //get input port in al,dx //get bit rcl al,1 //put bit 7 into carry rcl word ptr rValue,1 //put bit into result xchg bx,dx //get cmd port mov al,tImage //get ctl image //toggle clk and read data bit 2 and al,0xfe //clr sclk out dx,al //send bit out dx,al //delay or al,0x01 //set sclk out dx,al //rising clock out dx,al //delay #ifdef SLOWPORT out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay #endif xchg dx,bx //get input port in al,dx //get bit rcl al,1 //put bit 7 into carry rcl word ptr rValue,1 //put bit into result xchg bx,dx //get cmd port mov al,tImage //get ctl image //toggle clk and read data bit 1 and al,0xfe //clr sclk out dx,al //send bit out dx,al //delay or al,0x01 //set sclk out dx,al //rising clock out dx,al //delay #ifdef SLOWPORT out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay #endif xchg dx,bx //get input port in al,dx //get bit rcl al,1 //put bit 7 into carry rcl word ptr rValue,1 //put bit into result xchg bx,dx //get cmd port mov al,tImage //get ctl image //toggle clk and read data bit 0 and al,0xfe //clr sclk out dx,al //send bit out dx,al //delay or al,0x01 //set sclk out dx,al //rising clock out dx,al //delay #ifdef SLOWPORT out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay out dx,al //rising edge out dx,al //delay #endif xchg dx,bx //get input port in al,dx //get bit rcl al,1 //put bit 7 into carry rcl word ptr rValue,1 //put bit into result xchg bx,dx //get cmd port mov al,tImage //get ctl image //set cs enable high, lptCO bit 3, h/w inverted and al,0xf7 //set inverted cs high out dx,al //send command }; return((int)(~rValue & 0x0fff)); }; /* * get byte digital data. */ __declspec(dllexport) unsigned char getDigDat(void) { unsigned char tImage = ctlImage.w; unsigned char rValue = 0; int tCO = lptCO; int tSI = lptSI; /*disable a2d*/ tImage &= 0xf7; __asm { mov dx,word ptr tCO mov bx,word ptr tSI mov al,byte ptr tImage //get image //load parallel digital input or al,0x04 //clr dld out dx,al //load input latch and al,0xfb //set dld out dx,al //clear load out dx,al //delay out dx,al //delay out dx,al //delay out dx,al //delay or al,0x04 //clr dld out dx,al //load serial reg and al,0xfb //set dld out dx,al //clear load out dx,al //delay out dx,al //delay out dx,al //delay out dx,al //delay //read bit 7 xchg dx,bx //get input port in al,dx //get bit rcl al,1 //bit 7 into carry rcl al,1 //bit 6 into carry rcl rValue,1 //carry into result xchg bx,dx //get cmd port mov al,tImage //get image and al,0xfe //clr sclk out dx,al //falling clock or al,0x01 //set sclk out dx,al //rising clock out dx,al //delay out dx,al //delay out dx,al //delay out dx,al //delay //read bit 6 xchg dx,bx //get input port in al,dx //get bit rcl al,1 //bit 7 into carry rcl al,1 //bit 6 into carry rcl rValue,1 //carry into result xchg bx,dx //get cmd port mov al,tImage //get image and al,0xfe //clr sclk out dx,al //falling edge or al,0x01 //set sclk out dx,al //rising edge out dx,al //delay out dx,al //delay out dx,al //delay out dx,al //delay //read bit 5 xchg dx,bx //get input port in al,dx //get bit rcl al,1 //bit 7 into carry rcl al,1 //bit 6 into carry rcl rValue,1 //carry into result xchg bx,dx //get cmd port mov al,tImage //get image and al,0xfe //clr sclk out dx,al //falling edge or al,0x01 //set sclk out dx,al //rising edge out dx,al //delay out dx,al //delay out dx,al //delay out dx,al //delay //read bit 4 xchg dx,bx //get input port in al,dx //get bit rcl al,1 //bit 7 into carry rcl al,1 //bit 6 into carry rcl rValue,1 //carry into result xchg bx,dx //get cmd port mov al,tImage //get image and al,0xfe //clr sclk out dx,al //falling edge or al,0x01 //set sclk out dx,al //rising edge out dx,al //delay out dx,al //delay out dx,al //delay out dx,al //delay //read bit 3 xchg dx,bx //get input port in al,dx //get bit rcl al,1 //bit 7 into carry rcl al,1 //bit 6 into carry rcl rValue,1 //carry into result xchg bx,dx //get cmd port mov al,tImage //get image and al,0xfe //clr sclk out dx,al //falling edge or al,0x01 //set sclk out dx,al //rising edge out dx,al //delay out dx,al //delay out dx,al //delay out dx,al //delay //read bit 2 xchg dx,bx //get input port in al,dx //get bit rcl al,1 //bit 7 into carry rcl al,1 //bit 6 into carry rcl rValue,1 //carry into result xchg bx,dx //get cmd port mov al,tImage //get image and al,0xfe //clr sclk out dx,al //falling edge or al,0x01 //set sclk out dx,al //rising edge out dx,al //delay out dx,al //delay out dx,al //delay out dx,al //delay //read bit 1 xchg dx,bx //get input port in al,dx //get bit rcl al,1 //bit 7 into carry rcl al,1 //bit 6 into carry rcl rValue,1 //carry into result xchg bx,dx //get cmd port mov al,tImage //get image and al,0xfe //clr sclk out dx,al //falling edge or al,0x01 //set sclk out dx,al //rising edge out dx,al //delay out dx,al //delay out dx,al //delay out dx,al //delay //read bit 0 xchg dx,bx //get input port in al,dx //get bit rcl al,1 //bit 7 into carry rcl al,1 //bit 6 into carry rcl rValue,1 //carry into result }; return(rValue); }; /* * output digital data 8 bits wide * * notes: * doenb is bit 0 in lptDO * sdi is bit 1 in lptCO * sclk is bit 0 in lptCO */ __declspec(dllexport) void putDigDat(unsigned char dData) { unsigned char tImage = ctlImage.w; int tCO = lptCO; int tDO = lptDO; int temp = 0x0008; /*disable a2d*/ tImage &= 0xf7; __asm { mov dx,word ptr tCO mov cx,word ptr temp //get bit cnt mov ah,byte ptr dData mov al,byte ptr tImage //get current control image //set outputs by shifting into hc595 bll: //send bit rcl ah,1 //data bit to carry jc bs //sdi inverted and al,0xfd //clr sdi jmp bd bs: or al,0x02 //set sdi bd: and al,0xfe //clr sclk out dx,al or al,0x01 //set sclk out dx,al //rising edge out dx,al //delay out dx,al //delay out dx,al //delay out dx,al //delay dec cx //bump bit cnt jnz bll //loop back //strobe parallel load bit doenb mov dx,word ptr tDO //get address mov al,0xff //clr doenb, pwr on out dx,al //falling edge mov al,0xfe //set doenb, pwr on out dx,al //rising edge out dx,al //delay out dx,al //delay out dx,al //delay out dx,al //delay }; }; /* * sleep for a certain amount of milliseconds. we cannot use * clock() for win dll here since for some reason it is not compatible * * wait is input in ms units */ __declspec(dllexport) void sleep200() { clock_t goal; goal = (clock_t)(0.2 * CLOCKS_PER_SEC) + clock(); while (goal > clock()); }; /*end of file*/