Scott Schifer

Occupation: Member Technical Staff, Electrical Engineer

Education: BSEE, California State University Long Beach.




EPLRS


I am currently working on the Enhanced Position Location System for the US Army at Raytheon Systems Company..
Right now I am coding an existing multi card design into an FPGA using VHDL for the EPLRS
mobile network radio. The primary goals are to redesign the product with commercial off the
shelf components to drastically cut cost and to increase producability.

For a description of the EPLRS Program see US Army, Fort Monmouth EPLRS Web Page



Airborne Data Processors





In the past I have worked on the design and support 1750A based microprocessors for the
F15 APG-63 and APG-70 radars as well as the F/A-18 APG-73 radar system at
Raytheon Systems Company. in El Segundo California.

I seem to spend most of my time staring at Mentor Graphics Design Architect software on a
Sun Sparc station and Model Tech Model Tech VHDL Simulator on a PC.


You can E-mail me at schifer@pacbell.net

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